Until recently, computing devices typically included a single processing unit for each socket available on the computing device's main circuit board. More recently, the single processing unit has been improved to include multiple cores, which enable the processor to execute instructions in parallel using the various cores. An ability to include additional processors or cores on a chip becomes more readily available as the footprint of the cores continues to decrease through advancements in manufacturing. The inclusion of many cores on a chip, termed “system on a chip” or “SOC”, where the SOC is accessible to the computing device through a socket, may present some new challenges to both hardware and software architects. One challenge is that the additional cores should be accessible by the socket with minimized communication paths that link the cores, thereby saving valuable space on the chip for additional cores or other necessary components. These challenges are further complicated when the availability of the cores may change during an operational life of the SOC.